1. Field of the Invention
The present invention relates to a printed circuit board, and in particular, to a printed circuit board using paste bumps and a manufacturing method thereof.
2. Description of the Related Art
The conventional multilayer printed circuit board is manufactured by forming inner layer circuits on the surface of a core board, such as a copper clad laminate (CCL), etc., through the application of an additive process or a subtractive process, etc., and by forming outer layer circuits through the stacking of insulation layers and metal layers in order, by the same method as for the inner layer circuits.
During the manufacturing process of a multilayer printed circuit board, various via holes are formed, such as IVH's (interstitial via holes), BVH's (blind via holes), and PTH's (plated through holes), etc., for electrical connection between the circuit patterns of each layer and between a circuit pattern and an electronic element. Among these, the PTH's, which are formed penetrating the entire thickness in the cross section of a board, also function as heat-releasing holes, in addition to the function of electrical connection mentioned above.
With developments in electronic components, there is a demand for technology which can improve the performance of HDI (high density interconnection) boards, to which the concepts of interlayer electrical connection and micro circuit wiring have been applied for higher density printed circuit boards. That is, to improve the performance of HDI boards, a technology is required which provides interlayer electrical connection and an adequate degree of freedom.
The method of manufacturing a multilayer printed circuit board according to prior art includes first perforating via holes (e.g. IVH's, etc.) in a core board (e.g. a CCL, etc.) by mechanical drilling, etc., forming plating layers (e.g. by chemical copper plating and/or copper electroplating, etc.) on the surfaces of the core board and on the inner perimeters of the via holes, filling the inside spaces of the IVH's and polishing the surfaces, and then forming inner layer circuits on the surfaces of the core board by applying an additive or a subtractive process, etc., and inspecting the circuits.
Next, a build-up process is performed by procedures of surface treatment and stacking RCC (resin coated copper), etc., and via holes are formed for interlayer electrical connection between circuit patterns by laser drilling, etc., after which outer layer circuits are formed on the surface of the stacked board and the circuits are inspected. To add more layers of circuit patterns, the process is repeated of surface treatment and stacking RCC, etc., forming via holes, plating the surfaces of the via holes, and afterwards forming outer layer circuits. Such a build-up process is repeated to form a desired number of circuit pattern layers.
That is, metal layers are formed after stacking insulation material, or insulation material that has a metal layer formed on its surface (e.g. RCC, etc.) is stacked, on the surfaces of a core board, after which BVH's are processed by laser drilling, etc., for electrical connection between metal layers and inner layer circuits, PTH's which penetrate the entire cross section of the printed circuit board are perforated by mechanical drilling, etc., outer layer circuit layers are formed on the surfaces of the insulation material by the same method as for the inner layer circuits, and the inner perimeters of the PTH's are plated so that the PTH's function as heat-releasing holes.
However, the conventional manufacturing process for multilayer printed circuit boards is unable to comply to requests for low costs according to lowering prices in the applied products (e.g. cell phones, etc.) and requests for reduced lead times for increased productivity, and thus there is a demand for a new manufacturing process that can resolve such problems.
Also, the conventional method requires a plating process which is complicated, expensive, and time-consuming, and does not provide a sufficient heat-releasing effect through the PTH's. Also, when forming circuit patterns after forming the plating layer, the conventional method presents difficulties in forming micro circuits, caused by the increase in thickness of the circuit patterns due to the plating layer.
Meanwhile, in order to simplify the complicated process of prior art and to manufacture a multilayer printed circuit quickly and inexpensively by a collective stacking procedure, the so-called “B2IT (buried bump interconnection technology)” has been commercialized, which allows a simple and convenient stacking process by printing paste on a copper foil 3 to form bumps 2′ and stacking an insulation material 1 thereon to prefabricate a paste bump board, as illustrated in FIG. 1.
Prior art related to the paste bump board includes an invention which uses a paste bump board having bumps made of conductive paste formed on a copper foil to allow simple and easy interconnection between the terminals of high-density electronic components. This invention, however, implements all-layer IVH's with only the paste bump board so that it has a weak structure. Also, there is a likelihood of short circuits occurring in a high-voltage, high-frequency environment, and there are paste bumps filled in the board's via holes so that the properties of heat release through PTH's have not been improved.